1. Field of the Disclosure
The present disclosure relates to methods of generating transistor shapes and data processing system readable media to perform the methods, and more particularly to methods of generating planar double gate transistor shapes and data processing system readable media to perform the methods.
2. Description of the Related Art
Conventional integrated circuits (“ICs”) can include single gate transistors, wherein active regions of those single gate transistors lie within a substantially monocrystalline silicon substrate and have a gate dielectric layer and a gate electrode overlying the active regions. Single gate transistors may have higher leakage current compared to planar double gate transistors.
Planar double gate transistors allow for better control of transistors. Converting a single gate transistor shape to a planar double gate transistor shape can be done manually during IC design. However, many integrated circuits include a million, a billion or more transistors within a single integrated circuit. The process of manually converting each of these transistor shapes requires an extraordinarily large number of man-hours.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments.